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  june 1998 f dr4420a single n -channel, logic level, powertrench tm mosfet general description features absolute maximum ratings t a = 25 o c unless otherwise noted symbol parameter f dr4420a units v dss drain-source voltage 30 v v gss gate-source voltage 20 v i d drain t current - continuous (note 1a) 11 a - pulsed 40 p d maximum power dissipation (note 1a) 1.8 w (note 1b) 1 (note 1c) 0.9 t j ,t stg operating and storage temperature range -55 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 70 c/w r q jc thermal resistance, junction-to-case (note 1) 20 c/w fdr 442 0 rev.d 11 a, 30 v. r ds(on ) = 0.009 w @ v gs = 10 v, r ds(on ) = 0.013 w @ v gs = 4.5 v. fast switching speed . low gate charge. small footprint 38% smaller than a standard so -8. l ow profile package(1mm thick). power handling capability similar to so-8. the supersot-8 family of n-channel logic level mosfets have been designed to provide a low profile, small footprint alternative to industry standard so-8 little foot type product. these mosfets are produced using fairchild semiconductor 's advanced powertrench process that has been tailored to minimize the on-state resistance and yet maintain superior switching performance . these devices are well suited for low voltage and battery powered applications where small package size is required without compromising power handling and fast switching. sot-23 supersot t m -8 soic-16 so-8 sot-223 supersot t m -6 1 5 6 7 8 4 3 2 d s d d s d d g supersot -8 tm pin 1 4420a ? 1998 fairchild semiconductor corporation
electrical characteristics (t a = 25 o c unless otherwise noted ) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 30 v d bv dss / d t j breakdown voltage temp. coefficient i d = 250 a , referenced to 25 o c 20 mv / o c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a t j = 5 5c 10 a i gss gate - body leakage current v gs = 20 v, v ds = 0 v 100 na i gss gate - body leakage, reverse v gs = -20 v, v ds = 0 v -100 na on characteristics (note 2) d v gs(th) / d t j gate threshold voltage temp.coefficient i d = 250 a , referenced to 25 o c -6 mv / o c v gs (th) gate threshold voltage v ds = v gs , i d = 250 a 1 1.4 3 v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 11 a 0.0075 0.009 w t j =12 5c 0.0125 0.016 v gs = 4.5 v, i d = 9 a 0.01 0.013 i d(on) on-state drain current v gs = 10 v, v ds = 5 v 30 a g fs forward transconductance v ds = 10 v, i d = 11 a 25 s dynamic characteristics c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 2560 pf c oss output capacitance 560 pf c rss reverse transfer capacitance 280 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd = 10 v, i d = 1 a, v gs = 10 v, r gen = 1 w 11 20 ns t r turn - on rise time 15 27 ns t d(off) turn - off delay time 25 40 ns t f turn - off fall time 21 34 ns q g total gate charge v ds = 15 v, i d = 9.3 a, v gs = 5 v 23 33 nc q gs gate-source charge 7 nc q gd gate-drain charge 11 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current 1.5 a v sd drain-source diode forward voltage v gs = 0 v, i s = 1.5 a (note 2 ) 0.7 1.2 v notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. r q ja shown below for single device operation on fr-4 board in still air. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. fdr 442 0 rev.d b. 125 o c/w on a 0.026 in 2 of pad of 2oz copper. a . 70 o c/w on a 1 in 2 pad of 2oz copper. c . 135 o c/w on a 0.005 in 2 of pad of 2oz copper.
fdr 442 0 rev.d 0 0.4 0.8 1.2 1.6 2 0 8 16 24 32 40 v , drain-source voltage (v) i , drain-source current (a) 3.5v 4.0v 4.5v ds d v =10v gs 6.0v 3.0v 2.5v 0 8 16 24 32 40 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance v = 3.0v gs d r , normalized ds(on) 10 6.0 5.0 4.5 3.5 4.0 typical electrical characteristics figure 1. on-region characteristics . figure 2. on-resistance variation with drain current and gate voltage . -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 1.8 t , junction temperature (c) drain-source on-resistance j v =10v gs i = 11a d r normalized ds(on) figure 3. on-resistance variation with temperature . 1 1.5 2 2.5 3 3.5 4 0 10 20 30 40 50 v , gate to source voltage (v) i , drain current (a) 25c 125c v = 10v ds gs d t = -55c j figure 5 . transfer characteristics. 2 4 6 8 10 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 v ,gate-source voltage (v) drain-source on-resistance i = 5.5a d gs r ,( ohm ) ds(on) t = 125 c a o 25 c o figure 4 . on resistance variation with gate-to -source voltage. 0 0.2 0.4 0.6 0.8 1 1.2 0.0001 0.001 0.01 0.1 1 5 40 v , body diode forward voltage (v) i , reverse drain current (a) t = 125c j 25c -55c v =0v gs sd s figure 6 . body diode forward voltage varia tion with source current and temperature.
fdr 442 0 rev.d typical electrical characteristics (continued) figure 9 . maximum safe operating area. 0 10 20 30 40 50 60 0 2 4 6 8 10 q , gate charge (nc) v , gate-source voltage (v) g gs i = 11a d v = 5v ds 15v 10v figure 7 . gate charge characteristics . 0.1 0.2 0.5 1 2 5 10 30 50 0.01 0.03 0.1 0.3 1 5 20 100 v , drain-source voltage (v) i , drain current (a) ds d 1s 100ms 10s 10ms rds(on) limit 1ms 100us dc v = 10v single pulse r = 135c/w t = 25c gs a q ja figure 10 . single pulse maximum power dissipation. 0.0001 0.001 0.01 0.1 1 10 100 300 0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 t , time (sec) transient thermal resistance 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = 135c/w q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 r(t), normalized effective figure 11 .transient thermal response curve . thermal characterization performed using the conditions described in note 1c . transient thermal response will change depending on the circuit board design. 0.1 0.3 1 3 10 30 200 500 1000 2000 3000 5000 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss figure 8 . capacitance characteristics . 0.0001 0.001 0.01 0.1 1 10 100 300 0 10 20 30 40 50 single pulse time (sec) power (w) single pulse r = 135c/w t = 25c q ja a
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?


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